
Kavya Belur Chandrashekar
Graduated with a Masters degree in VLSI Design and Embedded Systems, from R.V. College of Engineering. As a... | Langen, Hesse, Germany
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Kavya Belur Chandrashekar’s Emails ka****@cy****.com
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Kavya Belur Chandrashekar’s Location Langen, Hesse, Germany
Kavya Belur Chandrashekar’s Expertise Graduated with a Masters degree in VLSI Design and Embedded Systems, from R.V. College of Engineering. As a Graduate Technical Intern in Intel, developed a reusable Verification IP for ARM AMBA AHB Lite Protocol using SystemVerilog and UVM. Have 2 years of experience in embedded software development for Car Multimedia Infotainment Systems. Performed requirements analysis, high level and low level design, development and testing of HMI software for infotainment systems for international OEMs. Have hands-on experience with tools like Xilinx, Keil, Cadence Virtuoso and languages like Embedded C, Verilog, SystemVerilog, UVM/OVM. Interested to gain experience in the domains of Digital Logic Design, Functional Verification, Physical Design and Embedded System Design.
Kavya Belur Chandrashekar’s Current Industry Cypress Semiconductor
Kavya
Belur Chandrashekar’s Prior Industry
Robert Bosch
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Robert Bosch Engineering And Business Solutions
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Intel
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Altran Deutschland
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Cypress Semiconductor
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Work Experience

Cypress Semiconductor
Senior Electrical Design Engineer
Sat Jun 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Cypress Semiconductor
Electrical Design Engineer
Thu Mar 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jun 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time)
Altran Deutschland
Consultant
Fri Sep 01 2017 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jan 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Intel
Graduate Technical Intern
Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed Jun 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time)
Robert Bosch Engineering And Business Solutions
Associate Software Engineer
Fri Jun 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Sun Dec 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)
Robert Bosch
Intern
Sun Jan 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue May 01 2012 00:00:00 GMT+0000 (Coordinated Universal Time)